ASIC RTL Verification Engineer (Japan)

Yêu cầu ứng viên Bachelor's or Master's degree in Electrical Engineering or Electronic Engineering. 3 years or above experience in the area of digital IC verification. Candidates with more years of experience may be considered for Senior Engineer position. Working experience from design to tape-out are essential.Experience in system Verilog and UVM verification methodology.Experience in using EDA tools from Cadence, Synopsys.Knowledge and working experience in one or more of the following is a plus Digital and DSP design Microprocessor / Graphics processor productsKnowledge in connectivity technology such as USB, WIFI, Bluetooth, RFID, NFC, GPS, UART, SPI andI2CEmbedded programming using C language. Nice to have: Good knowledge in digital design techniques and the state-of-the-art physical design methods. Solid fundamentals in IC design flow and ASIC concepts.